CSIR vacancies for Project, July-2011

Department of Electronics Science
University of Delhi, South Campus
(Semiconductor Device Research Laboratory)

Applications are invited for the post for JRF @ (Rs.16000/- + 30% HRA pm) to work in the CSIR project entitled "Capacitive Modelling, Simulation, Characterization and Noise Analysis of Surrounded/Cylindrical Gate MOSFET (SGT/CGT) for High Frequency Applications"
Qualification: M.Sc Physics/Electronics with NET/GATE.

How to Apply: Applications with full particulars must reach the undersigned within 15 days from date of publication of this advertisement in employment news.